1. Field of the Invention
The present invention generally relates magnetic storage devices and more particularly relates to non-volatile magnetic memory cells as well as memory and logic switching devices employing the memory cells.
2. Description of the Related Art
The desired characteristics of a memory cell for computer memory are high speed, low power, non-volatility and low cost. Low cost is generally accomplished by use of simple fabrication processes and high cell density. Dynamic random access memory (DRAM) cells are fast and expend little power. However, the contents of DRAM cells are volatile and consequently have to be refreshed many times each second. Flash type EEPROM cells are non-volatile, have low sensing power, and are constructed as a single device. However, EEPROM cells generally take microseconds to write data contents and milliseconds to erase such contents. This slow access time makes EEPROM cells undesirable for many applications, especially for use in computer main memory.
Unlike DRAM, magnetic memory cells which store information as the orientation of magnetization of a ferromagnetic region can hold stored information for long periods of time, and are therefore, non-volatile. Certain types of magnetic memory cells that use the magnetic state to alter the electrical resistance of the materials near the ferromagnetic region are collectively known as magneto resistive (MR) memory cells. An array of such MR memory cells is generally referred to as magnetic RAM or MRAM. MRAM devices were first proposed in the form of a bi-stable magnetic element employing MR sensing in U.S. Pat. No. 3,375,091. The cells of the MRAM were designed based on the anisotropic magneto resistance (AMR) effect of magnetic metals and alloys. The MRAM cell has two stable magnetic configurations with a "high" resistance representing a logic state 0 and "low" resistance representing a logic state one. However, the magnitude of the AMR effect is generally less than 5% in most ferromagnetic systems, which limits the magnitude of the sensing signal. This translates into very slow access times for such devices.
More sensitive and efficient prototype MRAM devices have recently been fabricated using spin-valve structures exhibiting giant magnetoresistance (GMR), as disclosed by Tang et al. in "Spin-Valve Ram Cell", IEEE Trans. Magn., Vol. 31, 3206 (1995). The basic storage element disclosed is a stripe which consists of a pair of magnetic layers separated by a thin copper spacer layer. The magnetization of one of the magnetic layers is pinned in a fixed magnetic orientation by exchange coupling to a thin anti-ferromagnetic layer, while the magnetization of the other layer is free. When the magnetization of the free layer is the same as that of the pinned layer, the resistance of the cell is lower then when the magnetization of the layers are opposite to one another. These two magnetic configurations represent the "0" and "1" logic states. Such devices exhibit resistance changes as high as 14%, which result in higher signal levels and faster access times than previous MRAM cells. However, upon reading the contents of the cell, the contents are destroyed. Moreover, the inherently low resistance of the spin-valve devices requires high sensing power, which make the production of high density memory devices prohibitive.
A magnetic tunnel junction (MTJ) is based on substantially different physical principles then AMR or GMR cells. In an MTJ, two magnetic layers are separated by an insulating tunnel barrier and the magnetoresistance results from the spin-polarized tunneling effect of conduction electrons between the two ferromagnetic layers. The tunneling current depends on the relative orientation of the magnetization of the two ferromagnetic layers. An MTJ is described by Moodera et al. in "Large Magnetoresistance at Room Temperature in Ferromagnetic Thin Film Tunnel Junctions", Phy. Rev. Lett., Vol. 74, No.16, Apr. 17, 1995, pp.3273-3276.
A schematic of an MTJ is shown in FIG. 1. The central component is a sandwich of three layers including two ferromagnetic metal layers (FM1 and FM2) separated by an insulator layer. The thickness of FM1 102 and FM2 104 can be any value in the range from a few atomic layers to a few microns. The thickness of the insulator layer 106 is in the range of 1-10 nanometers (nm). When a voltage 108 is applied across FM layers 102 and 104, electrons from one FM layer can tunnel through the insulating layer 106 and enter the other FM layer to give rise to an electrical current called tunneling current, I.sub.t. The magnitude of the tunneling current I.sub.t depends on the magnitude of the voltage. The resistance of the MTJ is defined as R=V/I.sub.t, which is also a function of the applied voltage. The magnitude of the resistance is also dependent upon the relationship of the magnetization of FM layer 102 and FM layer 104. When the magnetization of the layers are parallel to each other, R assumes a small value, R.sub.min. When the magnetization of the layers are anti-parallel, the magnitude of R is at is its maximum, R.sub.max. In the range between these extremes (0&lt;.THETA.&lt;180.degree.), the value of the resistance varies between the minimum and maximum values.
Generally, the magnetization of FM1 102 can be fixed in a certain direction (for example, by having a higher coercivity material or by pinning it by anti-ferromagnetic exchange, as in the case of spin-valves), while changing the magnetization direction of FM2 104 by an applied magnetic field to achieve the desired resistance.
While MTJ devices have several characteristics which make them desirable for use in memory applications, previous practical limitations have prevented successful commercialization of these products. Accordingly, improved MTJ cell construction and memory device architecture are required to facilitate successful use of MTJ cells in commercial applications.